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The processor is responsible for carrying out the fetch/execute cycle. This involves accessing memory locations to read and write data, either before or after execution by the processor.

Modern processors are commonly quad-core processors. This means that there are actually four processors that make up the central processing unit. At first there was generally only one core on a processor. This evolved to become dual-core (two processors) and now quad-core.

The more processors present, the greater the number of tasks that can be processed simultaneously. This is known as parallel processing, as two different processors can process different tasks (threads) at the same time.

As processor technology evolves it is anticipated that octa-core processors (8 processors) will become more common.

There are three main components to every processor:

• registers
• ALU
• control unit

Registers

Registers are used to store data, instructions or addresses on the actual processor.

A register is simply a storage location on the processor. Data/instructions/addresses that are needed during the fetch/execute cycle are held within registers.

Registers offer the fastest access time of any storage location as they are part of the actual processor. There are a variety of registers with different purposes. Two examples are:

MAR – Memory Address Register

The MAR holds the address of the next item of data that is needed by the processor.

MDR – Memory Data Register

The MDR holds data that is either to be passed to the data bus or has just been received from the data bus.

ALU

The Arithmetic and Logic Unit is used by the processor to carry out operations that require the use of:

• Arithmetic operations such as +, -, *, /
• Logical operations such as AND, OR, NOT

Control Unit

The control unit is the term used to describe the part of the processor containing decoding circuitry and a series of independent lines that need to be used to signal the current state of the processor and fetch/execute cycle. Examples of the control lines are:

• Byte Enable Line - specifies the instruction size of the data being sent/received
• Read Line - initiates a memory read operation (from memory to the processor)
• Write Line - initiates a memory write operation (from the processor to memory)
• Clock Line - dictates the pace of the fetch/execute cycle
• Interrupt Line - used to indicate that an interrupt to the fetch/execute cycle is taking place
• Reset Line - resets the processor to its base state